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https://github.com/Ardour/ardour.git
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2e763add60
[Details] Added AVX versions of existing 5 SSE functions. Added 6th AVX function to copy vectors which is 1.5 times faster then memcpy. Data consistency and validness is fully tested after processing with new AVX functions on aligned and non aligned buffers.
103 lines
2.2 KiB
C++
103 lines
2.2 KiB
C++
// Added by JE - 05-12-2009. Inline assembler instructions
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// have been changed to Intel format and (in the case of
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// cpuid) was replaced by the equivalent VC++ system call).
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#if defined (COMPILER_MSVC) || defined (COMPILER_MINGW)
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#define _XOPEN_SOURCE 600
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#include <cstdlib>
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#include <stdint.h>
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#include <intrin.h> // Added by JE - 05-12-2009
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#include <assert.h>
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#include <pbd/fpu.h>
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#include <pbd/error.h>
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#include "i18n.h"
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using namespace PBD;
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using namespace std;
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FPU::FPU ()
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{
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unsigned long cpuflags_ECX = 0;
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unsigned long cpuflags_EDX = 0;
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_flags = (Flags)0;
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#ifndef USE_X86_64_ASM
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return;
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#endif
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// Get CPU lfags using Microsof function
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// It works for both 64 and 32 bit systems
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// no need to use assembler for getting info from register, this function does this for us
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int cpuInfo[4];
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__cpuid (cpuInfo, 1);
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cpuflags_ECX = cpuInfo[2]; // flags from ECX register
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cpuflags_EDX = cpuInfo[3]; // flags from EDX register
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if (cpuflags_ECX & (1<<28)) {
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_flags = Flags (_flags | (HasAVX) );
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}
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if (cpuflags_EDX & (1<<25)) {
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_flags = Flags (_flags | (HasSSE|HasFlushToZero) );
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}
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if (cpuflags_EDX & (1<<26)) {
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_flags = Flags (_flags | HasSSE2);
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}
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if (cpuflags_EDX & (1 << 24)) {
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char* fxbuf = 0;
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// allocate alligned buffer
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fxbuf = (char*)_aligned_malloc(512, 16);
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// Verify that fxbuf is correctly aligned
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unsigned long long buf_addr = (unsigned long long)(void*)fxbuf;
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if ((0 == buf_addr) || (buf_addr % 16))
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error << _("cannot allocate 16 byte aligned buffer for h/w feature detection") << endmsg;
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else
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{
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memset(fxbuf, 0, 512); // Initialize the buffer !!! Added by JE - 12-12-2009
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#if defined (COMPILER_MINGW)
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asm volatile (
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"fxsave (%0)"
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:
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: "r" (fxbuf)
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: "memory"
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);
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#elif defined (COMPILER_MSVC)
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__asm {
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mov eax, fxbuf
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fxsave [eax]
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};
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#endif
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uint32_t mxcsr_mask = *((uint32_t*) &fxbuf[28]);
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/* if the mask is zero, set its default value (from intel specs) */
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if (mxcsr_mask == 0) {
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mxcsr_mask = 0xffbf;
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}
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if (mxcsr_mask & (1<<6)) {
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_flags = Flags (_flags | HasDenormalsAreZero);
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}
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_aligned_free (fxbuf);
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}
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}
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}
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FPU::~FPU ()
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{
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}
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#else // !COMPILER_MSVC
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const char* pbd_fpu = "original pbd/fpu.cc takes precedence over this file";
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#endif // COMPILER_MSVC
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